A silicon substrate has been widely used as a substrate for electronic device. Recently, however, in order to achieve high mobility in a device such as a CMOS or the like, a substrate material such as an IV group semiconductor, an III-V group semiconductor or the like is used instead of the silicon substrate, and a technique of using as a channel material such a substrate material deposited on a silicon substrate attracts attention. For example, an electron or a hole of Ge that is an IV group semiconductor has higher mobility than that of an electron or a hole in silicon. Therefore, Ge is known as a semiconductor material having excellent electrical characteristics. In addition, in order to reduce an equivalent oxide film thickness (EOT), a high-k film is used as a gate insulating film.
The interface between the Ge substrate and the high-k film has poor electrical characteristics. Therefore, a technique for forming a Ge oxide film between a Ge substrate and a high-k film by using a slot antenna type plasma processing apparatus is suggested in Japanese Patent Application Publication No. 2012-209457.
In addition, Japanese Patent Application Publication No. 2013-161960 suggests a technique for forming a silicon oxide film on a silicon substrate at a low temperature of 100° C. or less by a low-power microwave plasma using a plasma processing apparatus for introducing a plurality of microwaves into a processing chamber through a plurality of microwave transmitting windows.
By forming the Ge oxide film as suggested in the Japanese Patent Application Publication No. 2012-209457, the electrical characteristics of the interface between the Ge substrate and the high-k film can be improved. However, in order to achieve high mobility, a film quality of the Ge oxide film needs to be further improved. In developing a next-generation device, it is expected to form an oxide film having a reduced interface state density with a thickness of 0.3 nm or less between the semiconductor substrate such as Ge and a high-k film. Therefore, there is required a technique capable of forming a thin Ge oxide film at a lower temperature while ensuring high controllability of a film thickness. Further, it is also required to decrease the EOT of the entire gate insulating film including the Ge oxide film.